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芯思原-数字电路后端设计工程师(广州)1.5-3万·14薪
硕士全职广州
更新于08月09日

职位亮点

五险一金,交通补贴,餐饮补贴,弹性工作,补充商业保险

职位描述

数字后端设计timingsign-off时序分析ECODRCLVSDIIRDrop
职位名称:数字电路后端设计工程师 (Physical Design Engineer)

职位描述:
1. 负责数字设计的后端实现,包括布局布线,timing sign-off,power sign-off;
2. 和前端工程师紧密合作以优化时序/面积/功耗,并进行静态时序分析;
3. 优化和验证流片的版图(包括寄生参数提取,ECO,DRC,LVS等);
4. 电压降(IR Drop)分析及优化,芯片尺寸(Die Size)的优化。

职位要求:
1. 硕士及以上学历,电子类相关专业;
2. 有相关IC后端自动布局布线(包括课程项目)经验;
3. 有ICC/StarRC/PrimeTime/RedHawk/Calibre等数字后端工具使用经验者优先;
4. 富有事业心和团队合作精神,沟通表达能力良好,中英文沟通顺利。

Job Description:
1. Responsible for the backend implementation of digital designs, including layout, routing, timing sign-off, and power sign-off.
2. Collaborate closely with frontend engineers to optimize timing, area, and power, and perform static timing analysis.
3. Optimize and verify the layout of the chip, including parasitic parameter extraction, ECO, DRC, LVS, etc.
4. Perform IR drop analysis and optimize the die size.

Qualifications:
1. Master’s degree or above in Electronics or related fields.
2. Previous experience in IC backend automatic layout and routing (including coursework projects).
3. Preferred experience with digital backend tools such as ICC, StarRC, PrimeTime, RedHawk, Calibre.
4. Self-motivated, with good teamwork and effective communication skills in both English and Chinese.

工作地点:广州、合肥
Base: Guangzhou、Hefei

公司信息

芯原微电子(上海)股份有限公司
已上市·1000-5000人·电子/半导体/集成电路